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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-08-23 14:37:52 +0800
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-07 11:16:41 +0100
commit8dfc2b14ebf538f28a05565f34913ecffedf5024 (patch)
treebe4866115ee59b042da6ec0987e36f1a55e7c9c9 /drivers/char
parent032d2a0d068b0368296a56469761394ef03207c3 (diff)
agp/intel: fix physical address mask bits for sandybridge
It should shift bit 39-32 into pte's bit 11-4. Reported-by:Takashi Iwai <tiwai@suse.de> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/char')
-rw-r--r--drivers/char/agp/intel-gtt.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index ce536e68b6c..7f35854d33a 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1333,8 +1333,8 @@ static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
dma_addr_t addr, int type)
{
- /* Shift high bits down */
- addr |= (addr >> 28) & 0xff;
+ /* gen6 has bit11-4 for physical addr bit39-32 */
+ addr |= (addr >> 28) & 0xff0;
/* Type checking must be done elsewhere */
return addr | bridge->driver->masks[type].mask;