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authorEmilio López <emilio@elopez.com.ar>2013-09-20 22:03:12 -0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-11-10 11:39:55 +0100
commit8e6a4c40bb6f3866548811f9f3882a627293fc2f (patch)
tree74927c0c89b29a9e3f60d10666ae4a215c74e5e4 /drivers/clk/sunxi
parent12ef06afb3959e7f6f2ae8917c4750883a3e8c14 (diff)
clk: sunxi: protect core clocks from accidental shutdown
Some important clocks may get disabled as a side effect of another clock being disabled, because they have no consumers. This patch implements a mechanism so those clocks can be claimed by the driver and therefore remain enabled at all times. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi')
-rw-r--r--drivers/clk/sunxi/clk-sunxi.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 34ee69f4d50..83d3eace3eb 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -617,6 +617,31 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat
}
}
+/**
+ * System clock protection
+ *
+ * By enabling these critical clocks, we prevent their accidental gating
+ * by the framework
+ */
+static void __init sunxi_clock_protect(void)
+{
+ struct clk *clk;
+
+ /* memory bus clock - sun5i+ */
+ clk = clk_get(NULL, "mbus");
+ if (!IS_ERR(clk)) {
+ clk_prepare_enable(clk);
+ clk_put(clk);
+ }
+
+ /* DDR clock - sun4i+ */
+ clk = clk_get(NULL, "pll5_ddr");
+ if (!IS_ERR(clk)) {
+ clk_prepare_enable(clk);
+ clk_put(clk);
+ }
+}
+
void __init sunxi_init_clocks(void)
{
/* Register all the simple and basic clocks on DT */
@@ -633,4 +658,7 @@ void __init sunxi_init_clocks(void)
/* Register gate clocks */
of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup);
+
+ /* Enable core system clocks */
+ sunxi_clock_protect();
}