diff options
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-09-02 18:43:56 +0300 |
|---|---|---|
| committer | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-11-26 18:46:20 +0200 |
| commit | 5bb9d26700c3db54d5a4346c3b6621b8889f3813 (patch) | |
| tree | e2a25e11c91601efe56ce027b7b11b45fab35177 /drivers/clk/tegra/clk.h | |
| parent | 343a607cb79259429afbb9820bf524d33084e66c (diff) | |
clk: tegra: Add TEGRA_PERIPH_NO_DIV flag
This flag indicates the peripheral clock does not have a divider. It will
simplify the initialization tables and avoids some very similar code.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk.h')
| -rw-r--r-- | drivers/clk/tegra/clk.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 997357ef059..a8267208471 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -397,6 +397,7 @@ struct tegra_clk_periph_gate { #define TEGRA_PERIPH_MANUAL_RESET BIT(1) #define TEGRA_PERIPH_ON_APB BIT(2) #define TEGRA_PERIPH_WAR_1005168 BIT(3) +#define TEGRA_PERIPH_NO_DIV BIT(4) void tegra_periph_reset(struct tegra_clk_periph_gate *gate, bool assert); extern const struct clk_ops tegra_clk_periph_gate_ops; |