summaryrefslogtreecommitdiffstats
path: root/drivers/clk/ux500
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2013-06-12 16:26:33 -0700
committerOlof Johansson <olof@lixom.net>2013-06-12 16:27:21 -0700
commit1e76c7cb3c1d281be2e452e780e53859abc7c145 (patch)
tree5199604868c08ab76ea17c860f1f2ab553670360 /drivers/clk/ux500
parent18c0e596791a1014781202a3af649f42a6d8495d (diff)
parenta38089057fa450944f2e2d07885d76fd727c8d16 (diff)
Merge tag 'exynos-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
From Kukjin Kim: Update exynos DT for - usb3phy and dwc3 for exynos5250 - keypad for exynos4412 - TMU clock for exynos4210 - MFC clock for exynos4 - DP controller for exynos5250 - G2D clock for exynos4 - some exynos boards * tag 'exynos-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (456 commits) ARM: dts: add ohci and ehci controller nodes for EXYNOS5440 ARM: dts: Update G2D documentation for clock entries ARM: dts: Add clock entries to G2D node for exynos4x12 ARM: dts: Add clock entries to G2D node for exynos4210 ARM: dts: Remove duplicate and add missing G2D nodes clk: exynos4: Add additional G2D clocks ARM: dts: Document DP clock in samsung,exynos5-dp binding ARM: dts: add pin state information for DP HPD support to Exynos5250 ARM: dts: add dts node for the ahci sata exynos5440 ARM: dts: add vmmc regulator support for ODROID-X ARM: dts: add max77686 node entry for ODROID-X ARM: dts: Enable RTC by default on EXYNOS5440 ARM: dts: Add display timing node to exynos5250-arndale.dts ARM: dts: Add clock provider information for DP controller in Exynos5250 SoC ARM: dts: Add DT node for DP controller for Arndale Board ARM: dts: Remove combiner IRQ node from exynos4x12.dtsi ARM: dts: add max8997 device node for exynos4210-origen board ARM: dts: Enable TMU on Origen4210 board ARM: dts: Add TMU clock entries to exynos4210.dtsi ARM: dts: Update MFC documentation for clock entries ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/clk/ux500')
-rw-r--r--drivers/clk/ux500/clk-sysctrl.c8
-rw-r--r--drivers/clk/ux500/u8500_clk.c2
2 files changed, 8 insertions, 2 deletions
diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c
index bc7e9bde792..e364c9d4aa6 100644
--- a/drivers/clk/ux500/clk-sysctrl.c
+++ b/drivers/clk/ux500/clk-sysctrl.c
@@ -145,7 +145,13 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
return ERR_PTR(-ENOMEM);
}
- for (i = 0; i < num_parents; i++) {
+ /* set main clock registers */
+ clk->reg_sel[0] = reg_sel[0];
+ clk->reg_bits[0] = reg_bits[0];
+ clk->reg_mask[0] = reg_mask[0];
+
+ /* handle clocks with more than one parent */
+ for (i = 1; i < num_parents; i++) {
clk->reg_sel[i] = reg_sel[i];
clk->reg_bits[i] = reg_bits[i];
clk->reg_mask[i] = reg_mask[i];
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 0b4f35a5ffc..80069c370a4 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -325,7 +325,7 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base,
BIT(0), 0);
clk_register_clkdev(clk, "fsmc", NULL);
- clk_register_clkdev(clk, NULL, "smsc911x");
+ clk_register_clkdev(clk, NULL, "smsc911x.0");
clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base,
BIT(1), 0);