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authorDinh Nguyen <dinguyen@altera.com>2013-09-17 11:23:05 -0500
committerMike Turquette <mturquette@linaro.org>2013-10-07 18:37:49 -0700
commit79a2e998895ae3e75d6d3d9fdeec2be94bfcf6c8 (patch)
tree220116b3a137afbbecfc42508da35013a8d1718e /drivers/clk
parent1022c75f5abd3a3b25e679bc8793d21bedd009b4 (diff)
clk: socfpga: Fix incorrect sdmmc clock name
The SD/MMC clock is named "sdmmc_clk", and NOT "mmc_clk". Because of this, the SD driver was getting the incorrect clock value. This prevented the SD driver from initializing correctly. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Olof Johansson <olof@lixom.net> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/socfpga/clk.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c
index 5bb848cac6e..81dd31a686d 100644
--- a/drivers/clk/socfpga/clk.c
+++ b/drivers/clk/socfpga/clk.c
@@ -49,7 +49,7 @@
#define SOCFPGA_L4_SP_CLK "l4_sp_clk"
#define SOCFPGA_NAND_CLK "nand_clk"
#define SOCFPGA_NAND_X_CLK "nand_x_clk"
-#define SOCFPGA_MMC_CLK "mmc_clk"
+#define SOCFPGA_MMC_CLK "sdmmc_clk"
#define SOCFPGA_DB_CLK "gpio_db_clk"
#define div_mask(width) ((1 << (width)) - 1)