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authorArnd Bergmann <arnd@arndb.de>2014-11-28 13:21:28 +0100
committerArnd Bergmann <arnd@arndb.de>2014-11-28 13:21:28 +0100
commit09ffd948a09256dfa57c46e0a31cf4af275ec61d (patch)
treecab8c7a3631f5c52ef13c353f74323cc4490ac14 /drivers/clk
parent5c5ee5e7c1aca390afa21da4f21ca0496e3567b8 (diff)
parentb04fa9f704aa818b87509ff4149bba810ef8bbd8 (diff)
Merge tag 'samsung-pm-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Pull "Samsung PM 3rd updates for v3.19" from Kukjin Kim: - exynos3250 : add PMU support - PMU refactoring : move restart code into PMU driver : move restart code for exynos440 into clk driver - use u8 for val[] in struct exynos_pmu_conf Note that this branch is based on tags/samsung-exynos-v3.19 * tag 'samsung-pm-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf ARM: EXYNOS: move restart code into pmu driver clk: exynos5440: move restart code into clock driver ARM: EXYNOS: add exynos3250 PMU support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/samsung/clk-exynos5440.c29
1 files changed, 28 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c
index 00d1d00a41d..979e81389cd 100644
--- a/drivers/clk/samsung/clk-exynos5440.c
+++ b/drivers/clk/samsung/clk-exynos5440.c
@@ -15,6 +15,8 @@
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/notifier.h>
+#include <linux/reboot.h>
#include "clk.h"
#include "clk-pll.h"
@@ -23,6 +25,8 @@
#define CPU_CLK_STATUS 0xfc
#define MISC_DOUT1 0x558
+static void __iomem *reg_base;
+
/* parent clock name list */
PNAME(mout_armclk_p) = { "cplla", "cpllb" };
PNAME(mout_spi_p) = { "div125", "div200" };
@@ -89,10 +93,30 @@ static const struct of_device_id ext_clk_match[] __initconst = {
{},
};
+static int exynos5440_clk_restart_notify(struct notifier_block *this,
+ unsigned long code, void *unused)
+{
+ u32 val, status;
+
+ status = readl_relaxed(reg_base + 0xbc);
+ val = readl_relaxed(reg_base + 0xcc);
+ val = (val & 0xffff0000) | (status & 0xffff);
+ writel_relaxed(val, reg_base + 0xcc);
+
+ return NOTIFY_DONE;
+}
+
+/*
+ * Exynos5440 Clock restart notifier, handles restart functionality
+ */
+static struct notifier_block exynos5440_clk_restart_handler = {
+ .notifier_call = exynos5440_clk_restart_notify,
+ .priority = 128,
+};
+
/* register exynos5440 clocks */
static void __init exynos5440_clk_init(struct device_node *np)
{
- void __iomem *reg_base;
struct samsung_clk_provider *ctx;
reg_base = of_iomap(np, 0);
@@ -125,6 +149,9 @@ static void __init exynos5440_clk_init(struct device_node *np)
samsung_clk_of_add_provider(np, ctx);
+ if (register_restart_handler(&exynos5440_clk_restart_handler))
+ pr_warn("exynos5440 clock can't register restart handler\n");
+
pr_info("Exynos5440: arm_clk = %ldHz\n", _get_rate("arm_clk"));
pr_info("exynos5440 clock initialization complete\n");
}