diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-11-26 12:57:58 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-11-26 12:57:58 +0100 |
| commit | eabc5fa51c1fae4b66cf883e3a3c2b3ca794494c (patch) | |
| tree | 7e17333920f4ab9986f3f40e881b4bc890a91724 /drivers/clk | |
| parent | 9489e9dcae718d5fde988e4a684a0f55b5f94d17 (diff) | |
| parent | df1590d9ae5e37e07e7cf91107e4c2c946ce8bf4 (diff) | |
Merge branch 'spear-for-3.8' of git://git.linaro.org/people/vireshk/linux into next/dt2
From Viresh Kumar <viresh.kumar@linaro.org>:
These are DT updates for SPEAr SoCs. There aren't any fixes that we want
to get into 3.7-rc* and we are happy with 3.8.
Some of the dtbs which use gpiopinctrl have dependency on Linus's
pinctrl tree, where an earlier update for adding gpiopinctrl node is present.
* 'spear-for-3.8' of git://git.linaro.org/people/vireshk/linux:
ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
ARM: SPEAr320: DT: Add SPEAr 320 HMI board support
ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT
ARM: SPEAr1310: Fix AUXDATA for compact flash controller
ARM: SPEAr13xx: Remove fields not required for ssp controller
ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
ARM: SPEAr: DT: Update device nodes
ARM: SPEAr: DT: add uart state to fix warning
ARM: SPEAr: DT: Modify DT bindings for STMMAC
ARM: SPEAr: DT: Fix existing DT support
ARM: SPEAr: DT: Update partition info for MTD devices
ARM: SPEAr: DT: Update pinctrl list
ARM: SPEAr13xx: DT: Add spics gpio controller nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/spear/spear1310_clock.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c index 0fcec2aae19..cf7e17685a2 100644 --- a/drivers/clk/spear/spear1310_clock.c +++ b/drivers/clk/spear/spear1310_clock.c @@ -20,6 +20,7 @@ #include <mach/spear.h> #include "clk.h" +#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000)) /* PLL related registers and bit values */ #define SPEAR1310_PLL_CFG (VA_MISC_BASE + 0x210) /* PLL_CFG bit values */ |