diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2014-05-27 10:03:39 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2014-05-27 10:06:05 +0200 |
| commit | 331b483f42fb4d04d52ce920ae10a71411c859a4 (patch) | |
| tree | 1f6399d3dc5a6a93b54b01bc2bb46b5f26c7dbab /drivers/clocksource/qcom-timer.c | |
| parent | 309179fabddd074f7da63c5602bc32cb6de677f9 (diff) | |
| parent | 2529c3a330797000d699d70c9a65b8525c6652de (diff) | |
Merge branch 'clockevents/3.16' of git://git.linaro.org/people/daniel.lezcano/linux into timers/core
This pull request contains the following changes:
* Laurent Pinchart did a lot of modifications to prepare the DT
support. These modifications include a lot of cleanup (structure
renaming, preparation to support multiple channel, kzalloc usage,
...) and then finishes to drop the old code to the new one.
* Jingoo Han removed the dev_err when an allocation fails because this
error is already given by the mm subsystems.
* Matthew Leach added the ARM global timer with vexpress, enabled the
ARM global timer with the A5 and added the definition in the DT. He
also fixed a invalid check when looking for an usable ARM global
timer for A9
* Maxime Ripard added the support for AllWinner A31 for sun4i and made
the timer reset optional through the DT
* Stephen Boyd used the msm timer for the udelay
* Uwe Kleine-König fixed the non-standard 'compatible' binding for efm32
* Xiubo Li clarified the types for the clocksource_mmio_read* and
added a new Flextimer Module (FTM) with its bindings
* Yang Wei added the 'notrace' attribute to 'read_sched_clock' for the
dw_apb_timer
Diffstat (limited to 'drivers/clocksource/qcom-timer.c')
| -rw-r--r-- | drivers/clocksource/qcom-timer.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c index e807acf4c66..8d115db1e65 100644 --- a/drivers/clocksource/qcom-timer.c +++ b/drivers/clocksource/qcom-timer.c @@ -26,6 +26,8 @@ #include <linux/of_irq.h> #include <linux/sched_clock.h> +#include <asm/delay.h> + #define TIMER_MATCH_VAL 0x0000 #define TIMER_COUNT_VAL 0x0004 #define TIMER_ENABLE 0x0008 @@ -179,6 +181,15 @@ static u64 notrace msm_sched_clock_read(void) return msm_clocksource.read(&msm_clocksource); } +static unsigned long msm_read_current_timer(void) +{ + return msm_clocksource.read(&msm_clocksource); +} + +static struct delay_timer msm_delay_timer = { + .read_current_timer = msm_read_current_timer, +}; + static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq, bool percpu) { @@ -217,6 +228,8 @@ err: if (res) pr_err("clocksource_register failed\n"); sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz); + msm_delay_timer.freq = dgt_hz; + register_current_timer_delay(&msm_delay_timer); } #ifdef CONFIG_ARCH_QCOM |