diff options
| author | Prashant Gaikwad <pgaikwad@nvidia.com> | 2012-06-05 09:59:43 +0530 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-06-12 10:32:57 -0600 |
| commit | 0df1ed4b12840f1d17b373ee5c05877c375ddc3e (patch) | |
| tree | 350df38d78c31662a30a2c43c80d54de8f4f64b5 /drivers/crypto | |
| parent | 65d2bdd343bd07c8de7df7352186bfe57994b5e7 (diff) | |
crypto: add clk_prepare/clk_unprepare
Use clk_prepare/clk_unprepare as required by the generic clk framework.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
| -rw-r--r-- | drivers/crypto/tegra-aes.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c index 422a9766c7c..ac236f6724f 100644 --- a/drivers/crypto/tegra-aes.c +++ b/drivers/crypto/tegra-aes.c @@ -572,7 +572,7 @@ static void aes_workqueue_handler(struct work_struct *work) struct tegra_aes_dev *dd = aes_dev; int ret; - ret = clk_enable(dd->aes_clk); + ret = clk_prepare_enable(dd->aes_clk); if (ret) BUG_ON("clock enable failed"); @@ -581,7 +581,7 @@ static void aes_workqueue_handler(struct work_struct *work) ret = tegra_aes_handle_req(dd); } while (!ret); - clk_disable(dd->aes_clk); + clk_disable_unprepare(dd->aes_clk); } static irqreturn_t aes_irq(int irq, void *dev_id) @@ -673,7 +673,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata, /* take mutex to access the aes hw */ mutex_lock(&aes_lock); - ret = clk_enable(dd->aes_clk); + ret = clk_prepare_enable(dd->aes_clk); if (ret) return ret; @@ -700,7 +700,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata, } out: - clk_disable(dd->aes_clk); + clk_disable_unprepare(dd->aes_clk); mutex_unlock(&aes_lock); dev_dbg(dd->dev, "%s: done\n", __func__); @@ -758,7 +758,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed, dd->flags = FLAGS_ENCRYPT | FLAGS_RNG; - ret = clk_enable(dd->aes_clk); + ret = clk_prepare_enable(dd->aes_clk); if (ret) return ret; @@ -788,7 +788,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed, memcpy(dd->dt, dt, DEFAULT_RNG_BLK_SZ); out: - clk_disable(dd->aes_clk); + clk_disable_unprepare(dd->aes_clk); mutex_unlock(&aes_lock); dev_dbg(dd->dev, "%s: done\n", __func__); |