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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-23 17:51:03 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-23 17:51:03 -0700
commit97e7292ab5ccd30a13c3612835535fc3f3e59715 (patch)
treec6db8a4d7a9fecc9acad270207d56c96b2f2edf6 /drivers/crypto
parenta5ebba6b54bc8038a38d3eacac3a79bbeaf3ee24 (diff)
parent36c678f3c91ac92e9524abcf9b39f9f539d60279 (diff)
Merge tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc clk changes from Arnd Bergmann: "Clock support is moving to the clk subsystem. These tegra, omap and imx changes are for code that is still platform specific and not (yet) part of that subsystem." Fix up conflicts in arch/arm/mach-{imx/clk-imx51-imx53.c,omap2/Makefile} * tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits) ARM: imx: clk-imx31: Fix clock id for rnga driver ARM: imx: add missing item to the list of clock event modes ARM: i.MX5x CSPI: Fixed clock name for CSPI ARM: i.MX5x clocks: Fix GPT clocks ARM: i.MX5x clocks: Fix parent for PWM clocks ARM: i.MX5x clocks: Add EPIT support ARM: mx27: Reenable silicon version print ARM: clk-imx27: Fix rtc clock id ARM: tegra: Provide clock for only one PWM controller ARM: tegra: Fix PWM clock programming ARM: OMAP3+: clock33xx: Add AM33XX clock tree data ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file ARM: tegra: dma: rename driver name for clock to "tegra-apbdma" ARM: tegra: Remove second instance of uart clk crypto: add clk_prepare/clk_unprepare ASoC: tegra: add clk_prepare/clk_unprepare staging: nvec: add clk_prepare/clk_unprepare spi/tegra: add clk_prepare/clk_unprepare Input: tegra-kbc - add clk_prepare/clk_unprepare USB: ehci-tegra: add clk_prepare/clk_unprepare ...
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/tegra-aes.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c
index 422a9766c7c..ac236f6724f 100644
--- a/drivers/crypto/tegra-aes.c
+++ b/drivers/crypto/tegra-aes.c
@@ -572,7 +572,7 @@ static void aes_workqueue_handler(struct work_struct *work)
struct tegra_aes_dev *dd = aes_dev;
int ret;
- ret = clk_enable(dd->aes_clk);
+ ret = clk_prepare_enable(dd->aes_clk);
if (ret)
BUG_ON("clock enable failed");
@@ -581,7 +581,7 @@ static void aes_workqueue_handler(struct work_struct *work)
ret = tegra_aes_handle_req(dd);
} while (!ret);
- clk_disable(dd->aes_clk);
+ clk_disable_unprepare(dd->aes_clk);
}
static irqreturn_t aes_irq(int irq, void *dev_id)
@@ -673,7 +673,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata,
/* take mutex to access the aes hw */
mutex_lock(&aes_lock);
- ret = clk_enable(dd->aes_clk);
+ ret = clk_prepare_enable(dd->aes_clk);
if (ret)
return ret;
@@ -700,7 +700,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata,
}
out:
- clk_disable(dd->aes_clk);
+ clk_disable_unprepare(dd->aes_clk);
mutex_unlock(&aes_lock);
dev_dbg(dd->dev, "%s: done\n", __func__);
@@ -758,7 +758,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed,
dd->flags = FLAGS_ENCRYPT | FLAGS_RNG;
- ret = clk_enable(dd->aes_clk);
+ ret = clk_prepare_enable(dd->aes_clk);
if (ret)
return ret;
@@ -788,7 +788,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed,
memcpy(dd->dt, dt, DEFAULT_RNG_BLK_SZ);
out:
- clk_disable(dd->aes_clk);
+ clk_disable_unprepare(dd->aes_clk);
mutex_unlock(&aes_lock);
dev_dbg(dd->dev, "%s: done\n", __func__);