diff options
| author | Rabin Vincent <rabin.vincent@stericsson.com> | 2010-10-12 13:00:54 +0000 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2010-10-19 15:17:07 -0700 |
| commit | 51f5d744ed07a6b82e5cbbeeabd73605d62dcfc9 (patch) | |
| tree | c9e0784f10734280277c3ab96f99917c7431432e /drivers/dma | |
| parent | 4a6aed3c4eb69702335ed3689132d07eabaaf86d (diff) | |
ste_dma40: remove enum for endianess
A bool will suffice. The default is little endian.
Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/ste_dma40.c | 4 | ||||
| -rw-r--r-- | drivers/dma/ste_dma40_ll.c | 6 |
2 files changed, 6 insertions, 4 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 31f7e97c29b..d82f431b55f 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2239,11 +2239,11 @@ static void d40_set_runtime_config(struct dma_chan *chan, /* Set up all the endpoint configs */ cfg->src_info.data_width = addr_width; cfg->src_info.psize = psize; - cfg->src_info.endianess = STEDMA40_LITTLE_ENDIAN; + cfg->src_info.big_endian = false; cfg->src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL; cfg->dst_info.data_width = addr_width; cfg->dst_info.psize = psize; - cfg->dst_info.endianess = STEDMA40_LITTLE_ENDIAN; + cfg->dst_info.big_endian = false; cfg->dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL; /* Fill in register values */ diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index cfc86a56d66..8557cb88b25 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -113,8 +113,10 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, dst |= 1 << D40_SREG_CFG_PRI_POS; } - src |= cfg->src_info.endianess << D40_SREG_CFG_LBE_POS; - dst |= cfg->dst_info.endianess << D40_SREG_CFG_LBE_POS; + if (cfg->src_info.big_endian) + src |= 1 << D40_SREG_CFG_LBE_POS; + if (cfg->dst_info.big_endian) + dst |= 1 << D40_SREG_CFG_LBE_POS; *src_cfg = src; *dst_cfg = dst; |