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authorBorislav Petkov <borislav.petkov@amd.com>2009-12-21 19:21:41 +0100
committerBorislav Petkov <borislav.petkov@amd.com>2009-12-24 11:07:08 +0100
commit92389102b6832fc779f5c37f1d9e3eaadea6e059 (patch)
tree2850ba9e9ab328adfd1f8575e151e76b4fd14d36 /drivers/edac
parent43f5e68733cfe8bed3c30b5c14c4993dffb29766 (diff)
amd64_edac: restrict PCI config space access
Do not access F2x19[0,4] on K8 since they're undefined there. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/amd64_edac.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 63c04d31cd7..c5facd951dd 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2349,7 +2349,7 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt)
amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0);
amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0);
- if (!dct_ganging_enabled(pvt)) {
+ if (!dct_ganging_enabled(pvt) && boot_cpu_data.x86 >= 0x10) {
amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1);
amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1);
}