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authorStephen Warren <swarren@nvidia.com>2011-08-23 00:39:55 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-08-24 08:28:37 +0100
commit470080015c1f8bbd15ba1486d5c4bd8a3e7fa79a (patch)
tree7136eb6568c99832a0eff9da231257b88c5d381b /drivers/gpio/gpio-tegra.c
parenta1e6b41e8ec152efceb3128592b83d40c8a28334 (diff)
ARM: 7052/1: gpio/tegra: Remove use of irq_to_gpio
irq_to_gpio is being removed. Replace the only use of that API by the ARM Tegra sub-architecture. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/gpio/gpio-tegra.c')
-rw-r--r--drivers/gpio/gpio-tegra.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 747eb40e8af..ecade29d79e 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -331,6 +331,7 @@ static struct lock_class_key gpio_lock_class;
static int __init tegra_gpio_init(void)
{
struct tegra_gpio_bank *bank;
+ int gpio;
int i;
int j;
@@ -352,14 +353,17 @@ static int __init tegra_gpio_init(void)
gpiochip_add(&tegra_gpio_chip);
- for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
- bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))];
+ for (gpio = 0; gpio < TEGRA_NR_GPIOS; gpio++) {
+ int irq = TEGRA_GPIO_TO_IRQ(gpio);
+ /* No validity check; all Tegra GPIOs are valid IRQs */
- irq_set_lockdep_class(i, &gpio_lock_class);
- irq_set_chip_data(i, bank);
- irq_set_chip_and_handler(i, &tegra_gpio_irq_chip,
+ bank = &tegra_gpio_banks[GPIO_BANK(gpio)];
+
+ irq_set_lockdep_class(irq, &gpio_lock_class);
+ irq_set_chip_data(irq, bank);
+ irq_set_chip_and_handler(irq, &tegra_gpio_irq_chip,
handle_simple_irq);
- set_irq_flags(i, IRQF_VALID);
+ set_irq_flags(irq, IRQF_VALID);
}
for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) {