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authorBaruch Siach <baruch@tkos.co.il>2012-11-22 11:46:14 +0200
committerGrant Likely <grant.likely@secretlab.ca>2012-11-30 11:12:07 +0000
commit835c192f3612639702d716024c1a5b66445dd860 (patch)
tree6c4f7b405df97f7615d136d92416781ba1b08f93 /drivers/gpio
parentb53bc2819a71099ecfc3d61ba0796b3dcc6be321 (diff)
gpio/pl061: remove old comment
Since 3ab524754 (gpio: pl061: convert to use generic irq chip) we only have one spinlock in struct pl061_gpio. Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-pl061.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 31d9c9e79ea..c1720de18a4 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -48,12 +48,7 @@ struct pl061_context_save_regs {
#endif
struct pl061_gpio {
- /* Each of the two spinlocks protects a different set of hardware
- * regiters and data structurs. This decouples the code of the IRQ from
- * the GPIO code. This also makes the case of a GPIO routine call from
- * the IRQ code simpler.
- */
- spinlock_t lock; /* GPIO registers */
+ spinlock_t lock;
void __iomem *base;
int irq_base;