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authorBen Widawsky <bwidawsk@gmail.com>2012-06-04 14:42:41 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-06-14 17:36:16 +0200
commitfe1cc68fcb11ca14f420068d1806eb5e719ac772 (patch)
tree29a6f05aa084b85b6a9816498b040d8b6296cf0a /drivers/gpu/drm/i915/Makefile
parent14d94a3d82ab3ef6b3a9f881e134d5b48323b202 (diff)
drm/i915: CXT_SIZE register offsets added
The GPUs can have different default context layouts, and the sizes could vary based on platform or BIOS. In order to back the context object with a properly sized BO, we must read this register in order to find out a sufficient size. Thankfully (sarcarm!), the register moves and changes meanings throughout generations. CTX and CXT differences are intentional as that is how it is in the documentation (prior to GEN6 it was CXT). Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'drivers/gpu/drm/i915/Makefile')
0 files changed, 0 insertions, 0 deletions