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authorChris Wilson <chris@chris-wilson.co.uk>2010-09-22 10:31:52 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-22 10:31:52 +0100
commitdfaae392f4461785eb1c92aeaf2a1040b184edba (patch)
tree2239f155fdbed50f82d218b3499d06fb7c68f288 /drivers/gpu/drm/i915/i915_drv.c
parent9e0ae53404700f1e4ae1f33b0ff92948ae0e509d (diff)
drm/i915: Clear the gpu_write_list on resetting write_domain upon hang
Otherwise we will hit a list handling assertion when moving the object to the inactive list. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c16
1 files changed, 1 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 4e83bb36888..2184d29e7a9 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -395,21 +395,7 @@ int i915_reset(struct drm_device *dev, u8 flags)
mutex_lock(&dev->struct_mutex);
- /*
- * Clear request list
- */
- i915_gem_retire_requests(dev);
-
- /* Remove anything from the flushing lists. The GPU cache is likely
- * to be lost on reset along with the data, so simply move the
- * lost bo to the inactive list.
- */
- i915_gem_reset_flushing_list(dev);
-
- /* Move everything out of the GPU domains to ensure we do any
- * necessary invalidation upon reuse.
- */
- i915_gem_reset_inactive_gpu_domains(dev);
+ i915_gem_reset_lists(dev);
/*
* Set the domains we want to reset (GRDOM/bits 2 and 3) as