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author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-19 12:21:28 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-21 11:19:52 +0100 |
commit | 9375e446e7f43be9a7c21e246cee35ea912532ec (patch) | |
tree | b30d34f156ed36c830cedc431b3ef4c6a85d2011 /drivers/gpu/drm/i915/i915_drv.c | |
parent | 9220434a8768902cd9cf248709972678b74aa8c1 (diff) |
drm/i915: Clear flushing lists on GPU reset
Owain Ainsworth noticed that the reset code failed to clear the flushing
list leaving the driver in an inconsistent state following a hung GPU.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index e58e91736f8..cb1ddc6af6a 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -385,6 +385,12 @@ int i965_reset(struct drm_device *dev, u8 flags) */ i915_gem_retire_requests(dev); + /* Remove anything from the flushing lists. The GPU cache is likely + * to be lost on reset along with the data, so simply move the + * lost bo to the inactive list. + */ + i915_gem_reset_flushing_list(dev); + /* * Set the domains we want to reset (GRDOM/bits 2 and 3) as * well as the reset bit (GR/bit 0). Setting the GR bit |