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authorRodrigo Vivi <rodrigo.vivi@gmail.com>2013-05-06 19:37:36 -0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-10 21:56:49 +0200
commit891348b2bf08d8946e0621bec49802897b28c1c4 (patch)
tree67c6f95f96180ab43fc4e9a75b243dc3798205b4 /drivers/gpu/drm/i915/i915_drv.c
parentb74ea102b746a1e5157d6b0c83f486ad3c6235d1 (diff)
drm/i915: Enable FBC at Haswell.
This patch introduce Frame Buffer Compression (FBC) support for HSW. FBC is tied to primary plane A in HSW. v2: Ville pointed out docs say FBC must be disabled before disabling the plane on HSW. v3: Really enabling it by default at HSW. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index cd84f774aac..a1a936fd34e 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -319,6 +319,7 @@ static const struct intel_device_info intel_haswell_m_info = {
.is_mobile = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
+ .has_fbc = 1,
};
static const struct pci_device_id pciidlist[] = { /* aka */