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authorImre Deak <imre.deak@intel.com>2014-04-14 20:24:36 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-05-05 09:09:06 +0200
commitaeab0b5af7df88284d101abf8d121f0e913b81ff (patch)
tree1732721ef7ecac55a45aa6a9fff1ba46caf3b2e8 /drivers/gpu/drm/i915/i915_drv.c
parente6069ca84dfafbfdbd0d429445b5858ec5b090ac (diff)
drm/i915: disable runtime PM if RC6 is disabled
On VLV we depend on RC6 to save the GT render and media HW context before going to the D3 state via RPM, so as a preparation for the VLV RPM support (added in an upcoming patch) disable RPM if RC6 is disabled. There is probably a similar dependency on other platforms too, so for safety require RC6 for those too. For these platforms (SNB, HSW, BDW) this is then a possible fix. v2: - require RC6 for all RPM platforms, not just for VLV (Paulo, Daniel) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b8c9896520a..2d4fc9161ca 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -951,7 +951,7 @@ static int intel_runtime_suspend(struct device *device)
struct drm_device *dev = pci_get_drvdata(pdev);
struct drm_i915_private *dev_priv = dev->dev_private;
- if (WARN_ON_ONCE(!dev_priv->rps.enabled))
+ if (WARN_ON_ONCE(!(dev_priv->rps.enabled && intel_enable_rc6(dev))))
return -ENODEV;
WARN_ON(!HAS_RUNTIME_PM(dev));