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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-10-07 17:41:22 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-11-07 18:42:21 +0100
commit6bcda4f0dfcbe78349b5b283af892913299c8b2a (patch)
treed88c95daa535ab2656a2ea20f92027aaa0a420ce /drivers/gpu/drm/i915/i915_drv.h
parent9500986159d9017f9277f9e42a1f9b13b5e0e666 (diff)
drm/i915: Cache HPLL frequency on VLV/CHV
We need the HPLL frequency when calculating cdclk. Currently we read that out from the hardware every single time, which isn't going to fly very well if the device is runtime suspended. So cache the HPLL frequency in dev_priv and use the cached value. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reference: https://bugs.freedesktop.org/show_bug.cgi?id=82939 Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2dc888ca339..8fb8eba08dc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1613,6 +1613,7 @@ struct drm_i915_private {
unsigned int fsb_freq, mem_freq, is_ddr3;
unsigned int vlv_cdclk_freq;
+ unsigned int hpll_freq;
/**
* wq - Driver workqueue for GEM.