diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-04-09 13:28:50 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-20 15:30:07 +0200 |
| commit | 8e5fd599eb219f1054e39b40d18b217af669eea9 (patch) | |
| tree | c1ebd1855cdf6fcbbd69630cd5e4840d83f87927 /drivers/gpu/drm/i915/i915_irq.c | |
| parent | 3278f67fa7c99d6739304ffe3c04fadd6d74ff80 (diff) | |
drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Antti Koskipää <antti.koskipaa@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 29 |
1 files changed, 14 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 4811908ee55..787ad93c5fa 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1787,30 +1787,29 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg) u32 master_ctl, iir; irqreturn_t ret = IRQ_NONE; - master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~DE_MASTER_IRQ_CONTROL; - iir = I915_READ(VLV_IIR); + for (;;) { + master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL; + iir = I915_READ(VLV_IIR); - if (master_ctl == 0 && iir == 0) - return IRQ_NONE; + if (master_ctl == 0 && iir == 0) + break; - I915_WRITE(GEN8_MASTER_IRQ, 0); + I915_WRITE(GEN8_MASTER_IRQ, 0); - gen8_gt_irq_handler(dev, dev_priv, master_ctl); + gen8_gt_irq_handler(dev, dev_priv, master_ctl); - valleyview_pipestat_irq_handler(dev, iir); + valleyview_pipestat_irq_handler(dev, iir); - /* Consume port. Then clear IIR or we'll miss events */ - if (iir & I915_DISPLAY_PORT_INTERRUPT) { + /* Consume port. Then clear IIR or we'll miss events */ i9xx_hpd_irq_handler(dev); - ret = IRQ_HANDLED; - } - I915_WRITE(VLV_IIR, iir); + I915_WRITE(VLV_IIR, iir); - I915_WRITE(GEN8_MASTER_IRQ, DE_MASTER_IRQ_CONTROL); - POSTING_READ(GEN8_MASTER_IRQ); + I915_WRITE(GEN8_MASTER_IRQ, DE_MASTER_IRQ_CONTROL); + POSTING_READ(GEN8_MASTER_IRQ); - ret = IRQ_HANDLED; + ret = IRQ_HANDLED; + } return ret; } |