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authorDave Airlie <airlied@redhat.com>2012-07-26 10:40:31 +1000
committerDave Airlie <airlied@redhat.com>2012-07-26 10:40:31 +1000
commit98c7b42375011ec37251e6fc85a0471cfe499eea (patch)
treea3b61011d6861704470a821d5136d1479d7ee2a2 /drivers/gpu/drm/i915/i915_irq.c
parent2536f7dc42556f63ee45b14e7d2d9696200f317a (diff)
parente8aeaee7b012f1cdb382765d17307445385aa87c (diff)
Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
Daniel writes: (this pull is the one with the bad patch dropped) First pile of fixes for 3.6 already, and I'm afraid it's a bit larger than what I'd wish for. But I've moved all the feature-y stuff to -next, so this really is all -fixes. Most of it is handling fallout from the hw context stuff, discovered now that mesa git has started using them for real. Otherwise all just small fixes: - unbreak modeset=0 on gen6+ (regressed in next) - const mismatch fix for ->mode_fixup - simplify overly clever lvds modeset code (current code can totally confuse backlights, resulting in broken panels until a full power draw restores them). - fix some fallout from the flushing_list disabling (regression only introduced in -next) - DP link train improvements (this also kills the last 3.2 dp regression afaik) - bugfix for the new ddc VGA detection on newer platforms - minor backlight fixes (one of them a -next regression) - only enable the required PM interrupts (to avoid waking up the cpu unnecessarily) - some really minor bits (workaround clarification, make coverty happy, hsw init fix) * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: (23 commits) drm/i915: unbreak lastclose for failed driver init drm/i915: Set the context before setting up regs for the context. drm/i915: constify mode in crtc_mode_fixup drm/i915/lvds: ditch ->prepare special case drm/i915: dereferencing an error pointer drm/i915: fix invalid reference handling of the default ctx obj drm/i915: Add -EIO to the list of known errors for __wait_seqno drm/i915: Flush the context object from the CPU caches upon switching drm/i915: Make the lock for pageflips interruptible drm/i915: don't forget the PCH backlight registers drm/i915: Insert a flush between batches if the breadcrumb was dropped drm/i915: missing error case in init status page drm/i915: mask tiled bit when updating ILK sprites drm/i915: try to train DP even harder drm/i915: kill intel_ddc_probe drm/i915: check whether we actually received an edid in detect_ddc drm/i915: fix up PCH backlight #define mixup drm/i915: Add comments to explain the BSD tail write workaround drm/i915: Disable the BLT on pre-production SNB hardware drm/i915: initialize power wells in modeset_init_hw ...
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 05014bc20ee..8a3828528b9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1066,6 +1066,7 @@ static void i915_record_ring_state(struct drm_device *dev,
struct drm_i915_private *dev_priv = dev->dev_private;
if (INTEL_INFO(dev)->gen >= 6) {
+ error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50);
error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring));
error->semaphore_mboxes[ring->id][0]
= I915_READ(RING_SYNC_0(ring->mmio_base));