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authorDavid S. Miller <davem@davemloft.net>2008-12-15 20:03:50 -0800
committerDavid S. Miller <davem@davemloft.net>2008-12-15 20:03:50 -0800
commiteb14f019597cd86c21a6c601d7e900f40030c2e7 (patch)
tree36fb2f36a1747f98988f87215db1eef3a71d45eb /drivers/gpu/drm/i915/i915_reg.h
parent9a4a84294b0d60b8c287131478f743ba2bc68949 (diff)
parenta3dd15444baa9c7522c8457ab564c41219dfb44c (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts: drivers/net/e1000e/ich8lan.c
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0e476eba36e..9d24aaeb8a4 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -522,6 +522,7 @@
#define DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED (2 << 0)
#define DCC_ADDRESSING_MODE_MASK (3 << 0)
#define DCC_CHANNEL_XOR_DISABLE (1 << 10)
+#define DCC_CHANNEL_XOR_BIT_17 (1 << 9)
/** 965 MCH register controlling DRAM channel configuration */
#define C0DRB3 0x10206