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authorVille Syrjälä <ville.syrjala@linux.intel.com>2013-01-24 15:29:48 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-01-24 23:22:53 +0100
commitd88b2270862087544dd5234d95976db51d8ee5bf (patch)
tree92ab8f990ec4369258caaf43408af51bb71ea47d /drivers/gpu/drm/i915/i915_reg.h
parent4b0599854b5669fbbb6c8b9a9463b550718bda11 (diff)
drm/i915: FB_BLC_SELF_VLV is VLV only and needs an offset
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 693baf90db9..86c4ffa3c05 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1159,7 +1159,7 @@
#define RAMCLK_GATE_D 0x6210 /* CRL only */
#define DEUC 0x6214 /* CRL only */
-#define FW_BLC_SELF_VLV 0x6500
+#define FW_BLC_SELF_VLV (VLV_DISPLAY_BASE + 0x6500)
#define FW_CSPWRDWNEN (1<<15)
/*