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authorChris Wilson <chris@chris-wilson.co.uk>2014-03-21 17:18:54 +0000
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-04-01 22:58:04 +0200
commitaa83e30d8f71c966498f8f7f587514283c47e1b6 (patch)
tree5b28f076a1a09253ed597a872e4a983e18bf7cbc /drivers/gpu/drm/i915/i915_reg.h
parentc8431fda9f9f3c3b7490cb44bd5720b494a2421e (diff)
drm/i915: Rename GFX_TLB_INVALIDATE_ALWAYS
The documentation calls this GFX_MODE bit "Flush TLB invalidate Mode". However, that is not a good name for an enable bit as it doesn't make it clear what is enabled. An even worse name is GFX_TLB_INVALIDATE_ALWAYS as enabling that bit actually prevents the TLB from being invalidated at every flush. This leads to great confusion when reading code and proposed patches. To get around this try to bake in what is enabled by setting the bit and call it GFX_TLB_INVALIDATE_EXPLICIT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: "Gupta, Sourab" <sourab.gupta@intel.com> Acked-by: "Gupta, Sourab" <sourab.gupta@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9f5b18d9d88..15c27479edb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -841,7 +841,7 @@ enum punit_power_well {
#define GFX_MODE_GEN7 0x0229c
#define RING_MODE_GEN7(ring) ((ring)->mmio_base+0x29c)
#define GFX_RUN_LIST_ENABLE (1<<15)
-#define GFX_TLB_INVALIDATE_ALWAYS (1<<13)
+#define GFX_TLB_INVALIDATE_EXPLICIT (1<<13)
#define GFX_SURFACE_FAULT_ENABLE (1<<12)
#define GFX_REPLAY_MODE (1<<11)
#define GFX_PSMI_GRANULARITY (1<<10)