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authorJesse Barnes <jbarnes@virtuousgeek.org>2010-12-20 11:34:20 -0800
committerChris Wilson <chris@chris-wilson.co.uk>2011-01-11 20:35:40 +0000
commita6044e23b784544fe567db75dbf9c4f684bd6d5b (patch)
treee2828ee5e59ba7e073283d5c890352892f22f793 /drivers/gpu/drm/i915/i915_reg.h
parentbee17e5ae6b68d21b9d193f34ccefeef9d4fffe0 (diff)
drm/i915: support overclocking on Sandy Bridge
In some configuration, the PCU may allow us to overclock the GPU. Check for this case and adjust the max frequency as appropriate. Also initialize the min/max frequencies to default values as indicated by hardware. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 677eca65a4b..1bc816f3934 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3240,6 +3240,7 @@
#define GEN6_PCODE_MAILBOX 0x138124
#define GEN6_PCODE_READY (1<<31)
+#define GEN6_READ_OC_PARAMS 0xc
#define GEN6_PCODE_WRITE_MIN_FREQ_TABLE 0x9
#define GEN6_PCODE_DATA 0x138128