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authorDave Airlie <airlied@redhat.com>2009-12-10 15:44:11 +1000
committerDave Airlie <airlied@redhat.com>2009-12-10 15:44:19 +1000
commit0b5e8db639de032bd4febbb0a5b1cd2c19bac26d (patch)
treeeddc436f8cbf85cea5205f7dc118bf0068c2d127 /drivers/gpu/drm/i915/i915_suspend.c
parent7b0a9e8302522d5f7bb7fab6b8a3c8ce8181609c (diff)
parent4f8d619cc3ab805aa1726c1dfe196a0705b955bd (diff)
Merge remote branch 'anholt/drm-intel-next' into drm-linus
Pull more Intel changes in, especially one to init the GTT properly
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index ab35e81b7cb..d5ebb00a9d4 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -756,10 +756,6 @@ int i915_save_state(struct drm_device *dev)
dev_priv->saveIMR = I915_READ(IMR);
}
- /* Clock gating state */
- dev_priv->saveD_STATE = I915_READ(D_STATE);
- dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); /* Not sure about this */
-
/* Cache mode state */
dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
@@ -834,8 +830,7 @@ int i915_restore_state(struct drm_device *dev)
}
/* Clock gating state */
- I915_WRITE (D_STATE, dev_priv->saveD_STATE);
- I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
+ intel_init_clock_gating(dev);
/* Cache mode state */
I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);