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authorChris Wilson <chris@chris-wilson.co.uk>2012-05-09 11:56:28 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-19 22:38:29 +0200
commit1833b134454d5300d8a9d07b78876a20395f01a9 (patch)
tree5a55265e3a927613c265c28a6fdc0037a139a431 /drivers/gpu/drm/i915/i915_suspend.c
parent0e43406bcc1868a316eea6012a0a09d992c53521 (diff)
drm/i915: gen6_enable_rps() wants to be called after ring initialisation
Currently we call gen6_enable_rps() (which writes into the per-ring register mmio space) from intel_modeset_init_hw() which is called before we initialise the rings. If we defer intel_modeset_init_hw() until afterwards (in the intel_modeset_gem_init() phase) all is well. v2: Rectify ordering of gem vs display HW init upon resume. (Daniel) v3: Fix up locking. (Paulo) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Smash Paulo's locking fix onto Chris' patch.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 73a5c3c12fe..0ede02a99d9 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -876,12 +876,6 @@ int i915_restore_state(struct drm_device *dev)
I915_WRITE(IER, dev_priv->saveIER);
I915_WRITE(IMR, dev_priv->saveIMR);
}
- mutex_unlock(&dev->struct_mutex);
-
- if (drm_core_check_feature(dev, DRIVER_MODESET))
- intel_modeset_init_hw(dev);
-
- mutex_lock(&dev->struct_mutex);
/* Cache mode state */
I915_WRITE(CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);