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| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-03-02 20:09:08 -0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-03-02 20:09:08 -0800 |
| commit | 13df7977431e3b906a23bb75f29e0f40a8d73f87 (patch) | |
| tree | bc2c78c3b816a65f90c31cccebdc15b38352c045 /drivers/gpu/drm/i915/intel_display.c | |
| parent | 6d8b3e1ad3d3815d9c87b8553493301e243af76a (diff) | |
| parent | 0414855fdc4a40da05221fc6062cccbc0c30f169 (diff) | |
Merge 3.14-rc5 into driver-core-next
We want the fixes in here.
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9fa24347963..4c167280949 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -8586,6 +8586,20 @@ static int intel_gen7_queue_flip(struct drm_device *dev, if (ring->id == RCS) len += 6; + /* + * BSpec MI_DISPLAY_FLIP for IVB: + * "The full packet must be contained within the same cache line." + * + * Currently the LRI+SRM+MI_DISPLAY_FLIP all fit within the same + * cacheline, if we ever start emitting more commands before + * the MI_DISPLAY_FLIP we may need to first emit everything else, + * then do the cacheline alignment, and finally emit the + * MI_DISPLAY_FLIP. + */ + ret = intel_ring_cacheline_align(ring); + if (ret) + goto err_unpin; + ret = intel_ring_begin(ring, len); if (ret) goto err_unpin; |