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authorJesse Barnes <jbarnes@virtuousgeek.org>2011-10-12 10:49:14 -0700
committerKeith Packard <keithp@keithp.com>2011-10-20 23:21:54 -0700
commitf7cb34d47d2e30a8eb6201390ad81e232541c6d0 (patch)
treea253d4eacfcf21623616524486a5fa8b8f48271e /drivers/gpu/drm/i915/intel_display.c
parent4b645f14021871e06ce96c359bbdf0b48248c26e (diff)
drm/i915: fix debug output for 3 pipe configs
We can have more than just A and B these days. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c9bbf5e8fbe..880d44e3835 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5549,7 +5549,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
/* Set up the display plane register */
dspcntr = DISPPLANE_GAMMA_ENABLE;
- DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');
+ DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
drm_mode_debug_printmodeline(mode);
/* PCH eDP needs FDI, but CPU eDP does not */