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authorDave Airlie <airlied@redhat.com>2010-08-04 09:51:27 +1000
committerDave Airlie <airlied@redhat.com>2010-08-04 09:51:27 +1000
commitfa0a6024da61d96a12fab18991b9897292b43253 (patch)
tree35ba7b067863f649dc37c4b67a3ed740c0d9736d /drivers/gpu/drm/i915/intel_hdmi.c
parent4c70b2eae371ebe83019ac47de6088b78124ab36 (diff)
parent7b824ec2e5d7d086264ecae51e30e3c5e00cdecc (diff)
Merge remote branch 'intel/drm-intel-next' of /ssd/git/drm-next into drm-core-next
* 'intel/drm-intel-next' of /ssd/git/drm-next: (230 commits) drm/i915: Clear the Ironlake dithering flags when the pipe doesn't want it. drm/agp/i915: trim stolen space to 32M drm/i915: Unset cursor if out-of-bounds upon mode change (v4) drm/i915: Unreference object not handle on creation drm/i915: Attempt to uncouple object after catastrophic failure in unbind drm/i915: Repeat unbinding during free if interrupted (v6) drm/i915: Refactor i915_gem_retire_requests() drm/i915: Warn if we run out of FIFO space for a mode drm/i915: Round up the watermark entries (v3) drm/i915: Typo in (unused) register mask for overlay. drm/i915: Check overlay stride errata for i830 and i845 drm/i915: Validate the mode for eDP by using fixed panel size drm/i915: Always use the fixed panel timing for eDP drm/i915: Enable panel fitting for eDP drm/i915: Add fixed panel mode parsed from EDID for eDP without fixed mode in VBT drm/i915/sdvo: Set sync polarity based on actual mode drm/i915/hdmi: Set sync polarity based on actual mode drm/i915/pch: Set transcoder sync polarity for DP based on actual mode drm/i915: Initialize LVDS and eDP outputs before anything else drm/i915/dp: Correctly report eDP in the core connector type ...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_hdmi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 83bd764b000..197887ed182 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -54,10 +54,11 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
u32 sdvox;
- sdvox = SDVO_ENCODING_HDMI |
- SDVO_BORDER_ENABLE |
- SDVO_VSYNC_ACTIVE_HIGH |
- SDVO_HSYNC_ACTIVE_HIGH;
+ sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
+ if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
+ sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
+ if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
+ sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
if (hdmi_priv->has_hdmi_sink) {
sdvox |= SDVO_AUDIO_ENABLE;