diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2013-04-09 15:57:27 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-04-09 16:02:14 +0200 |
| commit | 71f6424023cb9fa381efc7237ca05926b2b1ca9a (patch) | |
| tree | 6c3c4a2110d0ff3d73c4bacaddb23b9295663695 /drivers/gpu/drm/i915/intel_i2c.c | |
| parent | 9bc128e16bb82c046d6972171de572affc5c4cbf (diff) | |
| parent | e933a1a12a02f42e0013cda87bba37ccb59efc47 (diff) | |
Merge branch 'mxs/cleanup' into next/multiplatform
This is a dependency for mxs/multiplatform
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
drivers/clocksource/Makefile
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_i2c.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index acf8aec9ada..ef4744e1bf0 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -203,7 +203,13 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin) algo->data = bus; } -#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 4) +/* + * gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI + * mode. This results in spurious interrupt warnings if the legacy irq no. is + * shared with another device. The kernel then disables that interrupt source + * and so prevents the other device from working properly. + */ +#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) static int gmbus_wait_hw_status(struct drm_i915_private *dev_priv, u32 gmbus2_status, @@ -214,6 +220,9 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv, u32 gmbus2 = 0; DEFINE_WAIT(wait); + if (!HAS_GMBUS_IRQ(dev_priv->dev)) + gmbus4_irq_en = 0; + /* Important: The hw handles only the first bit, so set only one! Since * we also need to check for NAKs besides the hw ready/idle signal, we * need to wake up periodically and check that ourselves. */ |