diff options
| author | Damien Lespiau <damien.lespiau@intel.com> | 2013-05-10 14:33:17 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-05-10 21:56:52 +0200 |
| commit | 7dd23ba0899bd1a203cc1d6e7878d7dfc910a511 (patch) | |
| tree | 7f7bfa955ad397091fe905f826efebeed96e7968 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 7881d4f11c00f506907b1bccb73df81509dc9c15 (diff) | |
drm/i915: Add missing platform tags to FBC workaround comments
There was a race between Rodrigo writing those patches and me
formalizing the addition of platform tags. This patches fixes it.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d806448f84f..28cec57e3f8 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -243,13 +243,13 @@ static void ironlake_disable_fbc(struct drm_device *dev) I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl); if (IS_IVYBRIDGE(dev)) - /* WaFbcDisableDpfcClockGating */ + /* WaFbcDisableDpfcClockGating:ivb */ I915_WRITE(ILK_DSPCLK_GATE_D, I915_READ(ILK_DSPCLK_GATE_D) & ~ILK_DPFCUNIT_CLOCK_GATE_DISABLE); if (IS_HASWELL(dev)) - /* WaFbcDisableDpfcClockGating */ + /* WaFbcDisableDpfcClockGating:hsw */ I915_WRITE(HSW_CLKGATE_DISABLE_PART_1, I915_READ(HSW_CLKGATE_DISABLE_PART_1) & ~HSW_DPFC_GATING_DISABLE); @@ -281,17 +281,17 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval) intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT); if (IS_IVYBRIDGE(dev)) { - /* WaFbcAsynchFlipDisableFbcQueue */ + /* WaFbcAsynchFlipDisableFbcQueue:ivb */ I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS); - /* WaFbcDisableDpfcClockGating */ + /* WaFbcDisableDpfcClockGating:ivb */ I915_WRITE(ILK_DSPCLK_GATE_D, I915_READ(ILK_DSPCLK_GATE_D) | ILK_DPFCUNIT_CLOCK_GATE_DISABLE); } else { - /* WaFbcAsynchFlipDisableFbcQueue */ + /* WaFbcAsynchFlipDisableFbcQueue:hsw */ I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe), HSW_BYPASS_FBC_QUEUE); - /* WaFbcDisableDpfcClockGating */ + /* WaFbcDisableDpfcClockGating:hsw */ I915_WRITE(HSW_CLKGATE_DISABLE_PART_1, I915_READ(HSW_CLKGATE_DISABLE_PART_1) | HSW_DPFC_GATING_DISABLE); |