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authorVille Syrjälä <ville.syrjala@linux.intel.com>2013-02-12 22:01:38 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-02-20 00:21:40 +0100
commit2b1086cc584286838ec55de24c1fb749f97bc3db (patch)
treea7b7672e946898ee8c9dfb23edcb24a0510abea2 /drivers/gpu/drm/i915/intel_ringbuffer.c
parent9d6d9f19e8146fa24903cb561e204a22232740e3 (diff)
drm/i915: Print the pipe control page GTT address
We already print the HWS addresses during init, so do the same for the pipe control page. Reduces guesswork when looking at hex addresses later. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 00525ff5904..9b8b0588c83 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -467,6 +467,9 @@ init_pipe_control(struct intel_ring_buffer *ring)
if (pc->cpu_page == NULL)
goto err_unpin;
+ DRM_DEBUG_DRIVER("%s pipe control offset: 0x%08x\n",
+ ring->name, pc->gtt_offset);
+
pc->obj = obj;
ring->private = pc;
return 0;