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author | Rafael Barbalho <rafael.barbalho@intel.com> | 2014-03-31 18:21:29 +0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-04-03 11:29:37 +0200 |
commit | eb6008ad30fe51b5be36d2ccce2c9c0409ac88a4 (patch) | |
tree | 77db4b8c14b1205aa8f5aefaee391a867f99a40c /drivers/gpu/drm/i915/intel_ringbuffer.h | |
parent | 0d95e11b7e27536dbb52c42a8bb5a6f31d7c24cf (diff) |
drm/i915: Fix framecount offset
The framecount register was still using the old PIPE macro instead
of the new PIPE2 macro
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.h')
0 files changed, 0 insertions, 0 deletions