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authorZou Nan hai <nanhai.zou@intel.com>2010-11-02 16:31:01 +0800
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-02 10:44:23 +0000
commit8d19215be8254f4f75e9c5a0d28345947b0382db (patch)
tree178c5be6a4d209058cb8354d060586b6370086cd /drivers/gpu/drm/i915/intel_ringbuffer.h
parent897ef192514a6b0fc10a0ce3fe7e7aa0de09bc52 (diff)
drm/i915: SNB BLT workaround
On some stepping of SNB cpu, the first command to be parsed in BLT command streamer should be MI_BATCHBUFFER_START otherwise the GPU may hang. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> [ickle: rebased for -next] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.h')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index acd23374fe8..68043f1a186 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -55,6 +55,7 @@ struct intel_ring_buffer {
struct drm_i915_gem_execbuffer2 *exec,
struct drm_clip_rect *cliprects,
uint64_t exec_offset);
+ void (*cleanup)(struct intel_ring_buffer *ring);
/**
* List of objects currently involved in rendering from the
@@ -90,6 +91,8 @@ struct intel_ring_buffer {
wait_queue_head_t irq_queue;
drm_local_map_t map;
+
+ void *private;
};
static inline u32