diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-03-31 18:21:27 +0300 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-04-03 11:28:39 +0200 |
commit | 0d95e11b7e27536dbb52c42a8bb5a6f31d7c24cf (patch) | |
tree | b43fb88d685842610dc6f92f21187c5e1573231b /drivers/gpu/drm/i915/intel_sideband.c | |
parent | 2070f00c79f627eb0ca47a537e5635424b5550ca (diff) |
drm/i915: Warn when DPIO read returns 0xffffffff
DPIO reads from groups/broadcast register offsets for PCS and
TX return all 1's. If that result gets used for something
we'll probably end up doing something wrong. So warn when that
happens.
FIXME there might be some registers where all 1's is a valid value,
so ideally we should check the register offset instead...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: copypaste the FIXME comment into the code.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sideband.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_sideband.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c index 0954f132726..b1a5514e695 100644 --- a/drivers/gpu/drm/i915/intel_sideband.c +++ b/drivers/gpu/drm/i915/intel_sideband.c @@ -182,6 +182,14 @@ u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg) vlv_sideband_rw(dev_priv, DPIO_DEVFN, DPIO_PHY_IOSF_PORT(DPIO_PHY(pipe)), DPIO_OPCODE_REG_READ, reg, &val); + + /* + * FIXME: There might be some registers where all 1's is a valid value, + * so ideally we should check the register offset instead... + */ + WARN(val == 0xffffffff, "DPIO read pipe %c reg 0x%x == 0x%x\n", + pipe_name(pipe), reg, val); + return val; } |