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authorChris Wilson <chris@chris-wilson.co.uk>2010-12-04 17:49:46 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2010-12-05 00:37:37 +0000
commit4add75c43f39573edc884d46b7c2b7414f01171a (patch)
tree60b087b749261b0b8e25be45622243666e3931d1 /drivers/gpu/drm/i915
parentf684f5b48cd27a031928c137531aace728d765a6 (diff)
drm/i915: Allow LVDS to be on pipe A for Ironlake+
Previously we enabled this for gen4, only to have to revert it due to it causing a large number of spurious wakeups. Try again hoping that the hardware has become more sane in the mean time... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index d07055c4d84..6d1106eafcf 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -907,6 +907,8 @@ bool intel_lvds_init(struct drm_device *dev)
intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
intel_encoder->crtc_mask = (1 << 1);
+ if (INTEL_INFO(dev)->gen >= 5)
+ intel_encoder->crtc_mask |= (1 << 0);
drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
connector->display_info.subpixel_order = SubPixelHorizontalRGB;