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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-03-05 13:05:45 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-03-05 21:30:43 +0100
commitc7c656226842679bcd9f39dc24441b4ff398a850 (patch)
treebd500b2c76b5ba523858c7b126014cc9bf43a648 /drivers/gpu/drm/i915
parent38aecea0ccbb909d635619cba22f1891e589b434 (diff)
drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
Misplaced parens cause us to totally clobber the CHICKEN_PIPESL_1 registers with 0xffffffff. Move the parens to the correct place to avoid this. In particular this caused bit 30 of said registers to be set, which caused the sprite CSC to produce incorrect results. Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72220 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8df1826a601..2cc9de7899b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4839,8 +4839,8 @@ static void gen8_init_clock_gating(struct drm_device *dev)
/* WaPsrDPRSUnmaskVBlankInSRD:bdw */
for_each_pipe(pipe) {
I915_WRITE(CHICKEN_PIPESL_1(pipe),
- I915_READ(CHICKEN_PIPESL_1(pipe) |
- DPRS_MASK_VBLANK_SRD));
+ I915_READ(CHICKEN_PIPESL_1(pipe)) |
+ DPRS_MASK_VBLANK_SRD);
}
/* Use Force Non-Coherent whenever executing a 3D context. This is a