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authorBen Skeggs <bskeggs@redhat.com>2012-07-10 17:26:46 +1000
committerBen Skeggs <bskeggs@redhat.com>2012-10-03 13:12:47 +1000
commit70790f4f819875e8f390871fd15bbbf823f28e1b (patch)
tree47949ac5a0af23a9fe1ace1ac5fd8b8823b8e055 /drivers/gpu/drm/nouveau/nouveau_compat.h
parent8aceb7de47ea2491abc1a577dc875b19e9947a54 (diff)
drm/nouveau/clock: pull in the implementation from all over the place
Still missing the main bits we use to change performance levels, I'll get to it after all the hard yakka has been finished. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_compat.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_compat.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_compat.h b/drivers/gpu/drm/nouveau/nouveau_compat.h
index 9b3298bfe4e..8bf5bec8171 100644
--- a/drivers/gpu/drm/nouveau/nouveau_compat.h
+++ b/drivers/gpu/drm/nouveau/nouveau_compat.h
@@ -32,5 +32,17 @@ int nouveau_i2c_identify(struct drm_device *dev, const char *what,
int auxch_rd(struct drm_device *, struct nouveau_i2c_port *, u32, u8 *, u8);
int auxch_wr(struct drm_device *, struct nouveau_i2c_port *, u32, u8 *, u8);
+struct nvbios_pll;
+struct nouveau_pll_vals;
+
+u32 get_pll_register(struct drm_device *dev, u32 type);
+int get_pll_limits(struct drm_device *, u32, struct nvbios_pll *);
+int setPLL(struct drm_device *, u32 reg, u32 clk);
+
+int nouveau_calc_pll_mnp(struct drm_device *, struct nvbios_pll *,
+ int, struct nouveau_pll_vals *);
+int nva3_calc_pll(struct drm_device *dev, struct nvbios_pll *info, u32 freq,
+ int *N, int *fN, int *M, int *P);
+int nouveau_hw_setpll(struct drm_device *, u32, struct nouveau_pll_vals *);
#endif