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authorBen Skeggs <bskeggs@redhat.com>2010-03-29 10:06:09 +1000
committerBen Skeggs <bskeggs@redhat.com>2010-04-09 10:15:38 +1000
commit6f335a7afa6bc57603f39430dc6f9e57de288a91 (patch)
tree38b0a878a6272ebb22bf43ec296195e267b3a540 /drivers/gpu/drm/nouveau/nouveau_encoder.h
parentd327dd4e771b5820743aeba0622116c5c8806388 (diff)
drm/nv50: preserve an unknown SOR_MODECTRL value for DP encoders
This value interacts with some registers we don't currently know how to program properly ourselves. The default of 5 that we were using matches what the VBIOS on early DP cards do, but later ones use 6, which would cause nouveau to program an incorrect mode on these chips. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_encoder.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_encoder.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h b/drivers/gpu/drm/nouveau/nouveau_encoder.h
index bc4a24029ed..9f28b94e479 100644
--- a/drivers/gpu/drm/nouveau/nouveau_encoder.h
+++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h
@@ -47,6 +47,7 @@ struct nouveau_encoder {
union {
struct {
+ int mc_unknown;
int dpcd_version;
int link_nr;
int link_bw;