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authorBen Skeggs <bskeggs@redhat.com>2010-05-31 09:04:03 +1000
committerBen Skeggs <bskeggs@redhat.com>2010-06-01 09:49:12 +1000
commit8b281db596744a15b2abbfdbf655796c64e172ca (patch)
treec8f1960cef9d1e0359176aea69d2012ab8e322c5 /drivers/gpu/drm/nouveau/nouveau_mem.c
parentbecd214277ed41dc6f745f5f8db39d84c6c7ffc8 (diff)
drm/nv50: cast IGP memory location to u64 before shifting
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_mem.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_mem.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 775a7017af6..c1fd42b0dad 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -540,7 +540,8 @@ nouveau_mem_detect(struct drm_device *dev)
dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA);
dev_priv->vram_size &= NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK;
if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac)
- dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12;
+ dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10);
+ dev_priv->vram_sys_base <<= 12;
}
NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20));