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authorBen Skeggs <bskeggs@redhat.com>2010-09-27 09:47:56 +1000
committerBen Skeggs <bskeggs@redhat.com>2010-10-05 09:57:41 +1000
commit5c6dc6575460a0afe56d8cae7666e769e08ef942 (patch)
treeec0ccbac221f82212b99247249ee9cbb78f88100 /drivers/gpu/drm/nouveau/nouveau_pm.h
parentfe224bb7e12f1ea9a785ec942bc5d59950543888 (diff)
drm/nouveau: pass perflvl struct to clock_pre()
On certain boards, there's BIOS scripts and memory timings that need to be modified with the memclk. Just pass in the entire perflvl struct and let the chipset-specific code decide what to do. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_pm.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_pm.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.h b/drivers/gpu/drm/nouveau/nouveau_pm.h
index 7504e3b8c02..babe64ac33c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_pm.h
+++ b/drivers/gpu/drm/nouveau/nouveau_pm.h
@@ -48,12 +48,14 @@ void nouveau_mem_timing_fini(struct drm_device *);
/* nv04_pm.c */
int nv04_pm_clock_get(struct drm_device *, u32 id);
-void *nv04_pm_clock_pre(struct drm_device *, u32 id, int khz);
+void *nv04_pm_clock_pre(struct drm_device *, struct nouveau_pm_level *,
+ u32 id, int khz);
void nv04_pm_clock_set(struct drm_device *, void *);
/* nv50_pm.c */
int nv50_pm_clock_get(struct drm_device *, u32 id);
-void *nv50_pm_clock_pre(struct drm_device *, u32 id, int khz);
+void *nv50_pm_clock_pre(struct drm_device *, struct nouveau_pm_level *,
+ u32 id, int khz);
void nv50_pm_clock_set(struct drm_device *, void *);
/* nouveau_temp.c */