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authorLinus Torvalds <torvalds@linux-foundation.org>2010-04-09 11:50:01 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-04-09 11:50:01 -0700
commit2f10ffcfb28beb35137d9e86992c771b4a6c5f2a (patch)
tree67c7fc0b97e3125262616bdfcaec4eed816c09b4 /drivers/gpu/drm/nouveau/nv50_instmem.c
parentce82653d6cfcc95ba88c25908664878459fb1b8d (diff)
parent930b9d94579fa1ea9604cbf7ba56cedf99ba9b5c (diff)
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (29 commits) drm/nouveau: bail out of auxch transaction if we repeatedly recieve defers drm/nv50: implement gpio set/get routines drm/nv50: parse/use some more de-magiced parts of gpio table entries drm/nouveau: store raw gpio table entry in bios gpio structs drm/nv40: Init some tiling-related PGRAPH state. drm/nv50: Add NVA3 support in ctxprog/ctxvals generator. drm/nv50: another dodgy DP hack drm/nv50: punt hotplug irq handling out to workqueue drm/nv50: preserve an unknown SOR_MODECTRL value for DP encoders drm/nv50: Allow using the NVA3 new compute class. drm/nv50: cleanup properly if PDISPLAY init fails drm/nouveau: fixup the init failure paths some more drm/nv50: fix instmem init on IGPs if stolen mem crosses 4GiB mark drm/nv40: add LVDS table quirk for Dell Latitude D620 drm/nv40: rework lvds table parsing drm/nouveau: detect vram amount once, and save the value drm/nouveau: remove some unused members from drm_nouveau_private drm/nouveau: Make use of TTM busy_placements. drm/nv50: add more 0x100c80 flushy magic drm/nv50: fix fbcon when framebuffer above 4GiB mark ...
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_instmem.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv50_instmem.c16
1 files changed, 6 insertions, 10 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
index de1f5b0062c..5f21df31f3a 100644
--- a/drivers/gpu/drm/nouveau/nv50_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
@@ -63,9 +63,10 @@ nv50_instmem_init(struct drm_device *dev)
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_channel *chan;
uint32_t c_offset, c_size, c_ramfc, c_vmpd, c_base, pt_size;
+ uint32_t save_nv001700;
+ uint64_t v;
struct nv50_instmem_priv *priv;
int ret, i;
- uint32_t v, save_nv001700;
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -76,17 +77,12 @@ nv50_instmem_init(struct drm_device *dev)
for (i = 0x1700; i <= 0x1710; i += 4)
priv->save1700[(i-0x1700)/4] = nv_rd32(dev, i);
- if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac)
- dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12;
- else
- dev_priv->vram_sys_base = 0;
-
/* Reserve the last MiB of VRAM, we should probably try to avoid
* setting up the below tables over the top of the VBIOS image at
* some point.
*/
dev_priv->ramin_rsvd_vram = 1 << 20;
- c_offset = nouveau_mem_fb_amount(dev) - dev_priv->ramin_rsvd_vram;
+ c_offset = dev_priv->vram_size - dev_priv->ramin_rsvd_vram;
c_size = 128 << 10;
c_vmpd = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x1400 : 0x200;
c_ramfc = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x0 : 0x20;
@@ -106,7 +102,7 @@ nv50_instmem_init(struct drm_device *dev)
dev_priv->vm_gart_size = NV50_VM_BLOCK;
dev_priv->vm_vram_base = dev_priv->vm_gart_base + dev_priv->vm_gart_size;
- dev_priv->vm_vram_size = nouveau_mem_fb_amount(dev);
+ dev_priv->vm_vram_size = dev_priv->vram_size;
if (dev_priv->vm_vram_size > NV50_VM_MAX_VRAM)
dev_priv->vm_vram_size = NV50_VM_MAX_VRAM;
dev_priv->vm_vram_size = roundup(dev_priv->vm_vram_size, NV50_VM_BLOCK);
@@ -189,8 +185,8 @@ nv50_instmem_init(struct drm_device *dev)
i = 0;
while (v < dev_priv->vram_sys_base + c_offset + c_size) {
- BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, v);
- BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000);
+ BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, lower_32_bits(v));
+ BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, upper_32_bits(v));
v += 0x1000;
i += 8;
}