diff options
author | Grant Likely <grant.likely@secretlab.ca> | 2011-03-17 13:46:58 -0600 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2011-03-17 13:48:06 -0600 |
commit | 2dd22997679a88874c131f6e6ffb963e6d43b3a6 (patch) | |
tree | bfe1707dda7e755b8b550c6796e2649813bcfbb9 /drivers/gpu/drm/nouveau/nvc0_graph.c | |
parent | 36885ff0e6563687e6152da6d311abbf83c0198f (diff) | |
parent | 7b7adc4a016a1decb806eb71ecab98721fa7f146 (diff) |
Merge remote-tracking branch 'origin' into spi/next
Pull in Linus' tree to pick up changes required for the langwell gpio fixes
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvc0_graph.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c index eb18a7e89f5..3de9b721d8d 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.c +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c @@ -299,6 +299,14 @@ nvc0_graph_takedown(struct drm_device *dev) } static int +nvc0_graph_mthd_page_flip(struct nouveau_channel *chan, + u32 class, u32 mthd, u32 data) +{ + nouveau_finish_page_flip(chan, NULL); + return 0; +} + +static int nvc0_graph_create(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -395,6 +403,7 @@ nvc0_graph_create(struct drm_device *dev) nouveau_irq_register(dev, 25, nvc0_runk140_isr); NVOBJ_CLASS(dev, 0x902d, GR); /* 2D */ NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */ + NVOBJ_MTHD (dev, 0x9039, 0x0500, nvc0_graph_mthd_page_flip); NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */ NVOBJ_CLASS(dev, 0x90c0, GR); /* COMPUTE */ return 0; @@ -640,7 +649,6 @@ nvc0_graph_init(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph; - struct nvc0_graph_priv *priv; int ret; dev_priv->engine.graph.accel_blocked = true; @@ -665,7 +673,6 @@ nvc0_graph_init(struct drm_device *dev) if (ret) return ret; } - priv = pgraph->priv; nvc0_graph_init_obj418880(dev); nvc0_graph_init_regs(dev); @@ -730,9 +737,12 @@ nvc0_graph_isr(struct drm_device *dev) u32 class = nv_rd32(dev, 0x404200 + (subc * 4)); if (stat & 0x00000010) { - NV_INFO(dev, "PGRAPH: ILLEGAL_MTHD ch %d [0x%010llx] subc %d " - "class 0x%04x mthd 0x%04x data 0x%08x\n", - chid, inst, subc, class, mthd, data); + if (nouveau_gpuobj_mthd_call2(dev, chid, class, mthd, data)) { + NV_INFO(dev, "PGRAPH: ILLEGAL_MTHD ch %d [0x%010llx] " + "subc %d class 0x%04x mthd 0x%04x " + "data 0x%08x\n", + chid, inst, subc, class, mthd, data); + } nv_wr32(dev, 0x400100, 0x00000010); stat &= ~0x00000010; } |