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authorjacob.jun.pan@linux.intel.com <jacob.jun.pan@linux.intel.com>2011-02-18 13:42:54 -0800
committerThomas Gleixner <tglx@linutronix.de>2011-02-18 23:14:54 +0100
commit5df91509d324d44cfb11e55d9cb02fe18b53b045 (patch)
tree3076ee0783e0228bffd58011ddc8d3396a15bd62 /drivers/gpu/drm/nouveau/nvc0_instmem.c
parent13884c6680973f0ce3483dc59b636b4962d6dafe (diff)
x86: mrst: Remove apb timer read workaround
APB timer current count was unreliable in the earlier silicon, which could result in time going backwards. This problem has been fixed in the current silicon stepping. This patch removes the workaround which was used to check and prevent timer rolling back when APB timer is used as clocksource device. The workaround code was also flawed by potential race condition around the cached read value last_read. Though a fix can be done by assigning last_read to a local variable at the beginning of apbt_read_clocksource(), but this is not necessary anymore. [ tglx: A sane timer on an Intel chip - I can't believe it ] Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Alan Cox <alan@linux.intel.com> LKML-Reference: <1298065374-25532-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvc0_instmem.c')
0 files changed, 0 insertions, 0 deletions