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authorAlex Deucher <alexdeucher@gmail.com>2009-11-23 18:40:40 -0500
committerDave Airlie <airlied@redhat.com>2009-12-08 10:22:43 +1000
commitf92a8b6758bdc0f277c4f42aa7d736a205ac9ded (patch)
tree3feb11b2cb76229767c42a4a3d34d6e525b73364 /drivers/gpu/drm/radeon/atombios_dp.c
parent4143e919ea999c9356ae4f71b5a3a80e075290d5 (diff)
drm/radeon/kms: handle dp sinks in atom encoder/transmitter tables
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/atombios_dp.c')
-rw-r--r--drivers/gpu/drm/radeon/atombios_dp.c69
1 files changed, 69 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index e761fefaacb..76eb5c8a701 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -33,6 +33,75 @@
#define DP_LINK_STATUS_SIZE 6
+/* move these to drm_dp_helper.c/h */
+
+static const int dp_clocks[] = {
+ 54000, // 1 lane, 1.62 Ghz
+ 90000, // 1 lane, 2.70 Ghz
+ 108000, // 2 lane, 1.62 Ghz
+ 180000, // 2 lane, 2.70 Ghz
+ 216000, // 4 lane, 1.62 Ghz
+ 360000, // 4 lane, 2.70 Ghz
+};
+
+static const int num_dp_clocks = sizeof(dp_clocks) / sizeof(int);
+
+int dp_lanes_for_mode_clock(int max_link_bw, int mode_clock)
+{
+ int i;
+
+ switch (max_link_bw) {
+ case DP_LINK_BW_1_62:
+ default:
+ for (i = 0; i < num_dp_clocks; i++) {
+ if (i % 2)
+ continue;
+ if (dp_clocks[i] > mode_clock) {
+ if (i < 2)
+ return 1;
+ else if (i < 4)
+ return 2;
+ else
+ return 4;
+ }
+ }
+ break;
+ case DP_LINK_BW_2_7:
+ for (i = 0; i < num_dp_clocks; i++) {
+ if (dp_clocks[i] > mode_clock) {
+ if (i < 2)
+ return 1;
+ else if (i < 4)
+ return 2;
+ else
+ return 4;
+ }
+ }
+ break;
+ }
+
+ return 0;
+}
+
+int dp_link_clock_for_mode_clock(int max_link_bw, int mode_clock)
+{
+ int i;
+
+ switch (max_link_bw) {
+ case DP_LINK_BW_1_62:
+ default:
+ return 162000;
+ break;
+ case DP_LINK_BW_2_7:
+ for (i = 0; i < num_dp_clocks; i++) {
+ if (dp_clocks[i] > mode_clock)
+ return (i % 2) ? 270000 : 162000;
+ }
+ }
+
+ return 0;
+}
+
bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
int num_bytes, u8 *read_byte,
u8 read_buf_len, u8 delay)