diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2010-10-08 12:09:12 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-10-12 20:18:04 +1000 |
| commit | 3555e53b5b4915bc58d08ece6cb2bfa97dda1f9e (patch) | |
| tree | c0f59b38fbf066fa754f0b5fce164a5594fa3d39 /drivers/gpu/drm/radeon/evergreen.c | |
| parent | c919b371cb734f42b1130e706ecee262f8d9261d (diff) | |
drm/radeon/kms: leave certain CP int bits enabled
These bits are used for internal communication and should
be left enabled. This may fix s/r issues on some systems.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 315e1341a94..a90f0c03b83 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1521,7 +1521,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev) { u32 tmp; - WREG32(CP_INT_CNTL, 0); + WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); WREG32(GRBM_INT_CNTL, 0); WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); |