diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2011-03-02 20:07:37 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2011-03-03 11:56:56 +1000 |
| commit | c175ca9a4c8cb30a61ccefacf8243350e1db4162 (patch) | |
| tree | 0aba17024ba7363276cb9904b228bcffc12c938c /drivers/gpu/drm/radeon/evergreen_cs.c | |
| parent | e348762955ebb2d4a6906d920b8f538637f1093f (diff) | |
drm/radeon/kms: add cayman CS check support
Added to existing evergreen CS checker.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen_cs.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen_cs.c | 55 |
1 files changed, 52 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index 5c84fca00d3..5021bd2c161 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -29,6 +29,7 @@ #include "radeon.h" #include "evergreend.h" #include "evergreen_reg_safe.h" +#include "cayman_reg_safe.h" static int evergreen_cs_packet_next_reloc(struct radeon_cs_parser *p, struct radeon_cs_reloc **cs_reloc); @@ -425,18 +426,28 @@ static inline int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u3 { struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track; struct radeon_cs_reloc *reloc; - u32 last_reg = ARRAY_SIZE(evergreen_reg_safe_bm); + u32 last_reg; u32 m, i, tmp, *ib; int r; + if (p->rdev->family >= CHIP_CAYMAN) + last_reg = ARRAY_SIZE(cayman_reg_safe_bm); + else + last_reg = ARRAY_SIZE(evergreen_reg_safe_bm); + i = (reg >> 7); if (i > last_reg) { dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx); return -EINVAL; } m = 1 << ((reg >> 2) & 31); - if (!(evergreen_reg_safe_bm[i] & m)) - return 0; + if (p->rdev->family >= CHIP_CAYMAN) { + if (!(cayman_reg_safe_bm[i] & m)) + return 0; + } else { + if (!(evergreen_reg_safe_bm[i] & m)) + return 0; + } ib = p->ib->ptr; switch (reg) { /* force following reg to 0 in an attemp to disable out buffer @@ -474,6 +485,20 @@ static inline int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u3 case DB_DEPTH_CONTROL: track->db_depth_control = radeon_get_ib_value(p, idx); break; + case CAYMAN_DB_EQAA: + if (p->rdev->family < CHIP_CAYMAN) { + dev_warn(p->dev, "bad SET_CONTEXT_REG " + "0x%04X\n", reg); + return -EINVAL; + } + break; + case CAYMAN_DB_DEPTH_INFO: + if (p->rdev->family < CHIP_CAYMAN) { + dev_warn(p->dev, "bad SET_CONTEXT_REG " + "0x%04X\n", reg); + return -EINVAL; + } + break; case DB_Z_INFO: r = evergreen_cs_packet_next_reloc(p, &reloc); if (r) { @@ -559,9 +584,23 @@ static inline int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u3 track->cb_shader_mask = radeon_get_ib_value(p, idx); break; case PA_SC_AA_CONFIG: + if (p->rdev->family >= CHIP_CAYMAN) { + dev_warn(p->dev, "bad SET_CONTEXT_REG " + "0x%04X\n", reg); + return -EINVAL; + } tmp = radeon_get_ib_value(p, idx) & MSAA_NUM_SAMPLES_MASK; track->nsamples = 1 << tmp; break; + case CAYMAN_PA_SC_AA_CONFIG: + if (p->rdev->family < CHIP_CAYMAN) { + dev_warn(p->dev, "bad SET_CONTEXT_REG " + "0x%04X\n", reg); + return -EINVAL; + } + tmp = radeon_get_ib_value(p, idx) & CAYMAN_MSAA_NUM_SAMPLES_MASK; + track->nsamples = 1 << tmp; + break; case CB_COLOR0_VIEW: case CB_COLOR1_VIEW: case CB_COLOR2_VIEW: @@ -987,6 +1026,16 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p, return -EINVAL; } break; + case CAYMAN_PACKET3_DEALLOC_STATE: + if (p->rdev->family < CHIP_CAYMAN) { + DRM_ERROR("bad PACKET3_DEALLOC_STATE\n"); + return -EINVAL; + } + if (pkt->count) { + DRM_ERROR("bad INDEX_TYPE/NUM_INSTANCES/CLEAR_STATE\n"); + return -EINVAL; + } + break; case PACKET3_INDEX_BASE: if (pkt->count != 1) { DRM_ERROR("bad INDEX_BASE\n"); |