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authorAlex Deucher <alexander.deucher@amd.com>2013-07-30 17:31:07 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-08-07 17:37:13 -0400
commit1518dd8efd47918bb269f1470030592875953f6c (patch)
treeccc676f40b8c16c71c357a6dfc35097c047d89a1 /drivers/gpu/drm/radeon/evergreend.h
parentce149a9406c104e7a361afae18a13d4eaa5c2429 (diff)
drm/radeon: fix audio dto calculation on DCE3+ (v3)
Need to set the wallclock ratio and adjust the phase and module registers appropriately. May fix problems with audio timing at certain display timings. v2: properly handle clocks below 24mhz v3: rebase r600 changes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreend.h')
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index a7baf67aef6..0d582ac1dc3 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -497,6 +497,9 @@
#define DCCG_AUDIO_DTO0_MODULE 0x05b4
#define DCCG_AUDIO_DTO0_LOAD 0x05b8
#define DCCG_AUDIO_DTO0_CNTL 0x05bc
+# define DCCG_AUDIO_DTO_WALLCLOCK_RATIO(x) (((x) & 7) << 0)
+# define DCCG_AUDIO_DTO_WALLCLOCK_RATIO_MASK 7
+# define DCCG_AUDIO_DTO_WALLCLOCK_RATIO_SHIFT 0
#define DCCG_AUDIO_DTO1_PHASE 0x05c0
#define DCCG_AUDIO_DTO1_MODULE 0x05c4